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W07 European Workshop on Silicon Lifecycle Management (eSLM)

Friday, 18 March 2022 08:00
Friday, 18 March 2022 18:00
Important Dates
    Submission Deadline
      Notification of acceptance
        Camera-ready material
        Mehdi Tahoori, Karlsruhe Institute of Technology, Germany
        General Chair
        Yervant Zorian, Synopsys, United States

        Aim and Scope 

        With increasing system complexity, security, stringent runtime requirements for functional safety, and cost constraints of a mass market, the reliable and secure operation of electronics in safety-critical, enterprise servers and cloud computing domains is still a major challenge. While traditionally design time and test time solutions were supposed to guarantee the in-field dependability and security of electronic systems, due to complex interaction of runtime effects from running workload and environment, there is a great need for a holistic approach for silicon lifecycle management, spanning from design time to in-field monitoring and adaptation. Therefore the solutions for lifecycle management should include various sensors and monitors embedded in different levels of the design stack, access mechanisms and standards for such on-chip and in-system sensor network, as well as data analytics on the edge and in the cloud. This European edition of the eSLM Workshop tries to build a community around this topic and offer a forum to present and discuss these challenges and emerging solutions among researchers and practitioners alike.

        Topic Areas

        The workshop’s areas of interest include (but are not limited to) the following topics:

        • Design and placement of various sensors and monitors for functional safety and security
        • Standards for sensor data aggregation
        • Data analytics for sensor data processing
        • Anomaly detection for security and   functional safety
        • Machine learning for in-field system health monitoring
        • Multi-layer dependability evaluation
        • In-field verification and validation 
        • Fault tolerance and self-checking circuits
        • Aging effects on electronics
        • Reuse and extension of test, debug and repair infrastructure for in-filed management
        • Power-up, power-down and periodic tests
        • System level test
        • Preventive Maintenance 
        • Concurrent and periodic checking
        • Functional and structural test generation
        • Graceful degradation
        • Useful remaining lifetime prediction
        • Failure prediction and forecasting
        • Attack prediction and prevention
        • In-field configuration and adaptation
        • Cross-layer solutions

        Preliminary Program



        • Yervant Zorian (Synopsys) and Mehdi Tahoori (KIT)

        8:45 - 10:15

        Presentation Session 1 (3 presentations)

        • Path Margin Analysis and Embedded In-Chip Monitoring for Failure Prediction and Reliability Optimization during the Silicon Lifecycle
          • Ramsay Allen and Stephen Crosher, Synopsys
        • Enabling Silicon Life Cycle Management Means Looking Beyond Silicon
          • Shafique Muhammad and Mike Denley, Siemens EDA
        • Using Reconfigurable Scan Networks to Support Silicon Lifecycle Management
          • Natalia Lylina, Chih-Hao Wang and Hans-Joachim Wunderlich, Uni Stuttgart




        Visionary Talk 1

        • A cross-layer approach towards management of Silicon lifecycle
          • Subrat Mishra, IMEC


        Presentation Session 2

        • Using SLM to address the challenge of security in connected vehicles.
          • Lee Harrison and Siraj Shaikh, Siemens EDA
        • EM-Aware Interconnect BIST
          • Somayeh Sadeghi-Kohan, Sybille Hellebrand and Hans-Joachim Wunderlich, Uni Stuttgart, Uni Paderborn
        • Silicon Lifecyle Management using Embedded Test & Repair
          • Grigor Tshagharyan, Synopsys


        Lunch Break


        Visionary Talk 2

        • Secure Silicon Lifecycle Management from Fab to Deployment
          • Mark Tehranipoor, FICS


        Presentation Session 3

        • In-field debug of compute systems
          • Sankaran Menon, Rolf Kuehnis, Intel




        Panel Discussion: „Challenges of the SLM ecosystem“

        • Organizer and Moderator: Hans-Joachim Wunderlich, Uni Stuttgart


        Visionary Talk 3

        • Ensuring Security from Edge Through Edge Throughout the Silicon Lifecycle
          • Adam Cron, Synopsys


        Closing Keynote

        • Silent Data Corruptions in Large Scale Infrastructure
          • Harish Dattatraya Dixit, Facebook


        Closing Remarks

        • Yervant Zorian (Synopsys) and Mehdi Tahoori (KIT)


        Panel Information

        Panel: „Challenges of the SLM ecosystem“

        Organizer: Hans-Joachim Wunderlich


        Silicon lifecycle management covers a broad variety of aspects and goals which may complement each other but which can also be in conflict. Examples are runtime test and diagnosis versus security, data collection in the cloud versus privacy, BIST versus monitoring or on-chip infrastructure and reliability. Renowned experts mainly from industry will discuss various challenges of the different aspects of SLM:



        • Dan Alexandrescu, IROC Technologies
        • Jürgen Alt, Infineon
        • Sonny Banwari, Advantest
        • Artur Jutman, Testonica
        • Martino Quattrocchi or Antonio Scrofani, ST
        • Aileen Ryan, Siemens (Mentor)
        • Mark Tehranipoor, FICS